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SETCACHE.DOC
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1993-12-16
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Cyrix 486SLC/486DLC
Cache Controller
The SETCACHE.EXE program initializes the Cyrix 486 chips internal Cache
to the desired mode. When the Cyrix chips are reset, cache is disabled.
This program allows the user to setup cache for maximum operation speed.
The SETCACHE program may be executed in the AUTOEXEC.BAT file to enable
cache operation at startup, or may be executed at any time from the
command line. The default values have proven to be the fastest operation,
however each user can establish their own setup.
Command Line options are as follows:(Options Help Screen)
Cache Control program for Cyrix 486SLC/486DLC Microprocessors. Ver. 1.2
COPYRIGHT Dec. 14, 1993 BY JOHN HICKEY of J. JENKS ENTERPRISES.
}SETCACHE [options] (Options as follows:)
o - display options help screen, overrides v t l m h r options.[New v1.2]
v - display current settings, overrides t l m h r options.[New v1.2]
t - DOS memory area A0000-FFFFF is not cached.[Changed v1.2]
l - Cache inhibit 64K at 1 meg boundaries.
m - Cache mode is direct-mapped.
h - Flush Cache on CPU Hold.
r#aaaaas - Inhibit cache at region #, starting
at address aaaaa X 1000h, for s size, where:
# - 1 to 4
aaaaa - 00000-FFFFF hex = address bits 31-12 of inhibited memory.
s - 0-F size code as follows:
size-code Range size-code Range size-code Range
0 - none N/A 1 - 4KBytes aaaaa 2 - 8KBytes aaaaj
3 - 16KBytes aaaak 4 - 32KBytes aaaal 5 - 64KBytes aaaa0
6 - 128KBytes aaaj0 7 - 256KBytes aaak0 8 - 512KBytes aaal0
9 - 1MBytes aaa00 A - 2MBytes aaj00 B - 4MBytes aak00
C - 8MBytes aal00 D - 16MBytes aa000 E - 32MBytes aj000
F - 4GBytes 00000(Cache is totally inhibited)
a = 0-F Hex j = 0, 2, 4, 6, 8, A, C or E Hex k = 0, 4, 8 or C Hex
l = 0 or 8 Hex Spaces unnecessary between options.
Defaults to 2-way assoc., all mem. cached except Video RAM A0000-BFFFF.
SETCACHE with no options will initialize the Cache to the default values
of 2-way associative cache and all memory cached except Video RAM at
A0000 through BFFFF.
Option
o - Displays the Options Help screen. Overrides all other options.
v - Read Cache settings and display them. Overrides all options except
option 'o'.
t - Inhibit Cache of DOS memory area A0000-FFFFF.
l - Inhibit Caching of 64k bytes at each 1meg boundary.
m - Cache Mode is direct mapped.
h - Flush cache on CPU HOLD.
r#aaaaas - Inhibit Cache in specific memory regions.
# - Non-Cacheable Region number 1 to 4.
aaaaa - Region beginning boundary address in 4k segments (1000 hex).
The boundary address must start on specific power of 2
address, depending upon the size code. Valid addresses
will be rounded down to the nearest appropriate value.
s - Size code 0-F hex specifying region granularity.
Size Boundary Boundary
code addr range ending digit(s)
0 - not N/A
1 - 4KBytes aaaaa(000) 0-F
2 - 8KBytes aaaaj " 0,2,4,6,8,A,C,E
3 - 16KBytes aaaak " 0,4,8,C
4 - 32KBytes aaaal " 0,8
5 - 64KBytes aaaa0 " 00-F0
6 - 128KBytes aaaj0 " 00,20,40,60,80,A0,C0,E0
7 - 256KBytes aaak0 " 00,40,80,C0
8 - 512KBytes aaal0 " 00,80
9 - 1MBytes aaa00 " 000-F00
A - 2MBytes aaj00 " 000,200,400,600,800,A00,C00,E00
B - 4MBytes aak00 " 000,400,800,C00
C - 8MBytes aal00 " 000,800
D - 16MBytes aa000 " 0000-F000
E - 32MBytes aj000 " 0000,2000,4000,6000,8000,A000,C000,E000
*F - 4GBytes 00000 " Cache is totally inhibited.
After the SETCACHE program executes, the values currently in the
Cache Controller registers are read back and are displayed as follows:
RX RY area-1 area-2 area-3 area-4
where
RX = Cache Control Register CCR0
RY = Cache Control Register CCR1
area-n = aaaaas for Non-Cacheable Region n.
SETCACHE Register display: (Default settings)
Cache Control program for Cyrix 486SLC/486DLC Microprocessors. Ver. 1.1
COPYRIGHT Dec. 8, 1993 BY JOHN HICKEY of J. JENKS ENTERPRISES.
00 00 000A06 000000 000000 000000
The Cache Controller settings will remain unchanged until a System Reset
is done or SETCACHE is rerun with new parameters.
!!CAUTION!!!
Do not run the program on any 80486 chip except the Cyrix or Texas
Instrument 486SLC or 486DLC chips. The Cache Control registers are
not compatible with INTEL 80486 chips.
Do not attempt to run this program on any CPU other than a 80486.
It uses 486 unique instructions and will cause illegal instruction
faults on lesser CPU's!!
NOTE:
It may be that some motherboards or BIOS's are incompatible with
enabling the 486 internal cache. One user reported that enabling the
cache did not increase the operation speed of his TI DLC chip (AMI BIOS,
UMC chip set), however moving the chip into a different motherboard
worked properly. (V1.2 - Found that the BIOS was disabling Cache by setting
bit 30 in CPU Control Register 0(CR0). Added code to enable cache in CPU
register CR0 if disabled.)
Another user (AMI BIOS, FOREX chip set) reported that
the Cache speeded up CPU operation, but prevented proper operation of the
Ctrl-Alt-Del reboot function. Further investigation is being made to
determine whether it is a chip set or BIOS problem. One possible answer is a
conflict between the BIOS and Cache. (V1.2 - Add the field 'R2000F05' to the
SETCACHE command to inhibit cacheing the BIOS ROM area, F0000 through FFFFF,
as one possible solution.)
The program has worked well with PHOENIX BIOS, AMI BIOS, VLSI chip set,
Chips and Technology chip set, and OPTI chip set.
WHATS NEW!
___________________________________________________________________________
Changes in Version 1.2.
It was found that some BIOS's set the Cache Disable bit 30 in the CPU
Control Register 0(CR0), preventing the internal 486DLC cache from working.
Code was added to Version 1.2 to test for Cache Disable in CR0 and clear
the Disable bit if necessary.
NOTE: This program can only be run in DOS Real mode and not in protected
mode such as a DOS window under WINDOWS.
___________________________________________________________________________
Changes in Version 1.1.
Added 'o' option to display help screen. Cache Registers are unchanged and
are not displayed with the help screen.
Added 'v' option to read current status of cache registers. Cache Registers
are unchanged.
Changed default settings to all memory cached except video RAM at A0000-BFFFF.
____________________________________________________________________________
SETCACHE.EXE is the Copyrighted work of John Hickey and J. JENKS Enterprises.
Copyright June, 1993
Copyright December, 1993
All Rights Reserved
Author : John C. Hickey
Date of release: 06/04/93
Version 1.1 : 12/08/93
Version 1.2 : 12/14/93
Please let me know if you have any problems or find the program to be
useful. Registered users may call if they have any problems, and will
be notified of any upgrades.
John Hickey
J. Jenks Enterprises
2155 Philippe Pkwy
Safety Harbor, Fl, 34695
(813) 726-0648